HBM smuggling routes into China; Nvidia H200s held in Hong Kong; Micron pauses Taiwan fab work; Samsung expands HBM base-die ...

Autonomous machines promise to transform industries, but memory bottlenecks, power constraints, specialized architectures, ...

SE: AI is disruptive to EDA, the semiconductor industry, and to their customers. One early indication is that computer ...

Shared resources, a mix of tools running at different speeds, and multiple dies are adding new challenges for design teams.

How data center operators can protect critical data and communications without compromising the performance demanded by distributed AI and HPC workloads.

Chiplets for physical AI; rack-level considerations; verification complexity; sparse matrix workloads; AI data centers.

Who verifies the verifier? This is the age-old question for anyone involved in the verification of semiconductor systems. Who ...

Shift left is pushing beyond verification to system-level validation. Fragmented workflows with disconnected tools and models are allowing bugs to escape even though individual components have been ...

Technology is only useful if it improves an existing methodology. Property generation is still refining that goal, but in the ...

This is the third article in a series examining what it takes to build production-ready AI agents for EDA. The first explored the architectural decisions required for agents to operate reliably in ...